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Korean Research Team Develops Tech to Draw Nano-scale Patterns in Semiconductors
Nanoscale Photolithography
Korean Research Team Develops Tech to Draw Nano-scale Patterns in Semiconductors
  • By Jung Suk-yee
  • March 6, 2015, 06:30
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Kim Tae-sung, professor at the School of Mechanical and Nuclear Engineering at Ulsan National Institute of Science and Technology (1st from left) and his advisees Kim Min-suk and Ha Do-kyung holding silicon wafers with micro- and nano-scale patterns.
Kim Tae-sung, professor at the School of Mechanical and Nuclear Engineering at Ulsan National Institute of Science and Technology (1st from left) and his advisees Kim Min-suk and Ha Do-kyung holding silicon wafers with micro- and nano-scale patterns.

 

A technique has been developed to draw detailed patterns on the surface of semiconductors by controlling nanometer-sized cracks. It is expected to contribute to distributing nanotechnologies using existing lithographic methods.

According to Ulsan National Institute of Science and Technology (UNIST) on Mar. 5, a research team headed by Kim Tae-sung, professor of the School of Mechanical and Nuclear Engineering at UNIST, has successfully developed a technology capable of creating and controlling nanometer-sized cracks occurring during the photolithography process. With the development of this technique, it will be possible to create nano-scale patterns in 30 minutes. Previously, it took 10 days. It will also be possible to freely control the length and thickness of the cracks. 

Currently, micro patterns are manufactured by a process called photolithography. In the process, a light-responding material is applied to the surface of a silicon wafer, and the wafer is covered with a mask with an engraved pattern. It is exposed to UV light, then the area that exposed to light is hardened, and thus the rest can be cut using a developing solution.

However, this method allows people to draw patterns at a micro level. For nano-sized patterns, expensive equipment like an electron-beam lithography system is required. This method is inefficient, since it cannot cover a large area. Moreover, it takes a lot of time and money to process. 

The research team was able to find a way to engrave nanometer-sized patterns on the surface of a silicon wafer using the existing manufacturing process. They were successful in changing the length and direction of cracks by creating different types of structures such as circles and triangles at the microscopic level. The most notable characteristic of this study is that the newly-developed technique can control cracks in line with the amount of light. 

Professor Kim noted, “The micro-nano structure produced by controlling cracks is a new alternative to existing complex and inefficient nanoprocessing technology.” He also remarked, “I think that it will bring about big changes in the overall industry, including machinery, electricity, electronics, bio-engineering, chemistry, environment, and energy, in addition to the materials industry.” The professor continued by saying, “We studied a subject in which various kinds of disciplines like mechanical engineering, materials engineering, and nano and bio engineering are needed.” He added, “It is a good example of convergence research done by a local team.”

The research findings were first published online on Feb. 18 by Nature Communications, a bi-monthly scientific journal published by the Nature Publishing Group.  The research was funded by the National Research Foundation, under the Project to Support Leading Researchers.