Exploring New Ways to Stack DRAM Cells
Samsung Electronics is speeding up research and development (R&D) of 3D DRAMs. The semiconductor giant has started to reinforce related organizations, such as recruiting personnel.
In the past, DRAMs were produced by lining up transistors and capacitors on a plane. However, as DRAM capacity exceeded 4 megabits in the late 1980s, it became difficult to improve DRAMs’ density, making it inevitable to rearrange circuits and capacitors. At that time, the DRAM industry was divided into the "trench group" that chose to place circuits and storages under planes and the "stack group" that opted to stack them up on planes.
Toshiba and NEC of Japan and IBM of the United States preferred the trench method, while Samsung Electronics went for the stack approach. At that time, Samsung Electronics adopted the stack approach because it was an easier way to make DRAMs and check problems in the production process. As a result, Samsung Electronics could build a semiconductor empire and has maintained its No. 1 position in the DRAM market for about 30 years.
After the stack method became common, chipmakers boosted DRAMs’ performance by reducing cell sizes or spacing. Yet, they hit a physical limit for increasing the number of cells in a limited space. Another issue is that if capacitors become slimmer and slimmer, they may collapse. The concept of a 3D DRAM came against this backdrop. Current DRAMs can be called 2D DRAMs.
Samsung Electronics has reportedly started developing a technology for stacking cells lying down. It is a different concept from high-bandwidth memory (HBM), which is produced by stacking multiple dies atop each other.
In addition, Samsung Electronics is also considering increasing the contact surface between the gate (current gate) and the channel (current path) of the DRAM transistor. This means that three-side-contact FinFet technology and four-side-contact gate-all-around (GAA) technology can be utilized for DRAM production. A transistor can control the flow of current more precisely when the contact surface between gates and channels increases.
Micron Technology and SK Hynix are also reportedly considering developing 3D DRAMs. Micron filed a patent application for a 3D DRAM different from that of Samsung Electronics. Micron’s method is to change the shapes of the transistor and capacitor without laying down a cell. Global semiconductor equipment makers such as Applied Materials and Lam Research have also begun to develop solutions related to 3D DRAMs.
However, it will take some time to commercialize 3D DRAMs due to difficulties in developing new materials and physical limitations. Industry insiders forecast that 3D DRAMs will begin to come out around 2025.