SK Hynix announced on Sept. 3 that it has succeeded in the development of the industry's fastest mobile DRAM chip, dubbed the Wide IO2 mobile DRAM.
The newly-developed model is one of the next-gen mobile DRAM chips that the Joint Electron Device Engineering Council (JEDEC) is trying to standardize, created using a new 20 nm cutting-edge process. The most notable characteristic is that low power consumption was strengthened in the 1.1V operating voltage, which is the same as the existing LPDDR4, and the data processing speed became faster by increasing the number of I/Os significantly.
LPDDR4 operates at a speed of 3.2 Gbps, and it is possible to process 12.8GB of data per second with 32 I/O channels. The Wide IO2 mobile DRAM, on the other hand, operates at a speed of 800Mbps per I/O. But it can process 51.2GB of data per second using 512 I/O channels. The new mobile DRAM is four times faster than existing LPDDR4, and thus it is one of the high-performance mobile DRAM chips.
The chipmaker already supplied samples to major system-on-chip (SoC) manufacturers, and is planning to mass-produce the new mobile DRAM chips starting in the latter half of 2015 to target the high-performance mobile DRAM market. Customer companies are going to feature SoCs, along with the Wide IO2 mobile DRAM. Hence, they are planning to supply the products in the form of a System in Package (SiP).
An official at SK Hynix said, “We will try hard to take the initiative in technology of the mobile DRAM market by consistently developing high-performance and low-power products.”