TSMC, the largest semiconductor foundry in the world, announced on Sept. 22 that it started 3 nanomter (nm) process technology R&D. The Taiwanese company is planning to initiate a 5 nm process later this year or next year and 3 nm process in 2021 or 2022. A semiconductor chip produced through the 3 nm process is expected to be 35 percent higher in performance and 50 percent higher in efficiency than a chip produced through the 7 nm process that is currently in use.
“Moore's law, that is, the number of transistors in a dense integrated circuit doubling about every two years is still valid although there are some mentioning its physical limitations,” the company explained, adding, “We are capable of reaching a 1 nm process as well as 3 nm.” The company is expected to invest US$6.5 billion in 2 nm process technology and manufacture products based on the technology in 2024.
TSMC’s plan is burdensome for Samsung Electronics, which is aiming to post the highest market share in the global foundry market before 2030. At present, Samsung’s uncertainties are mounting in the wake of Japan’s export restrictions applied to photoresists and the like.
“Samsung Electronics has completed its microfabrication R&D up to 3 nm and is hiring many people specialized in process and facility technology for use in extreme ultraviolet lithography,” said an industry insider, adding, “Still, its investment and process roadmaps can show any progress only after its uncertainties are addressed.”